Large Analog Bandwidth Recorder and Digitizer with Ordered Readout (LABRADOR) ASIC

نویسندگان

  • Gary S. Varner
  • Jing Cao
  • Peter Gorham
چکیده

This article describes the most recent generation of full-custom analog integrated circuit that is intended for low-power, high-speed sampling of Radio-Frequency (RF) transients in excess of the Nyquist minimum. A direct descendant of the Self-Triggered Recorder for Analog Waveforms (STRAW) architecture, and earlier variants of the LABRADOR (Large Analog Bandwidth Recorder and Digitizer with Ordered Readout) architecture, this design is distinguished in that readout speed is improved and dynamic range extended by providing direct digitization inside each storage cell. While direct analog access to the stored values is lost, the simplifications gained by not transferring the small analog storage values result in operational ease. In addition to the 8 RF channels, a 9 “timing” channel has been added to provide better system timing. A nominal conversion cycle requires 100μs, with an additional 50μs required for data transfer.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

The first version Buffered LargeAnalog Bandwidth (BLAB1)ASIC for high luminosity collider and extensive radio neutrino detectors

Future detectors for high luminosity particle identification and ultra high energy neutrino observation would benefit from a digitizer capable of recording sensor elements with high analog bandwidth and large record depth, in a cost-effective, compact and low-power way. A first version of the Buffered Large Analog Bandwidth (BLAB1) ASIC has been designed based upon the lessons learned from the ...

متن کامل

Large Analog Bandwidth Recorder and Digitizer with Ordered Readout version 3 (LABRADOR3) v0.99 User’s Manual

This article describes the most recent generation of full-custom analog integrated circuit that is intended for low-power, high-speed sampling of Radio-Frequency (RF) transients in excess of the Nyquist minimum. A direct descendant of the Self-Triggered Recorder for Analog Waveforms (STRAW) architecture, and earlier variants of the LABRADOR (Large Analog Bandwidth Recorder and Digitizer with Or...

متن کامل

A Radiation Hardened by Design Cmos Asic for Thermopile Readouts

Introduction: A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC (shown in Figure 1) includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital con...

متن کامل

A 15 GSa/s, 1.5 GHz bandwidth waveform digitizing ASIC

The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in largearea time-of-flight detector systems. The ASIC has been fabricated using the IBM-8RF 0:13 μm CMOS process. On each of the six analog channels, PSEC4 employs a switched capacitor array (SCA) of 256 samples deep, a ramp-compare ADC with 10.5 bits of DC dynamic range, and a serial data readout with...

متن کامل

A novel simulation and verification approach in an ASIC design process

For the Pre-Processor System of the ATLAS Level-1 Calorimeter Trigger we have built a fast signal-processing and readout ASIC (PPrAsic). The novel ASIC design environment incorporates algorithm development with digital hardware synthesis and verification. The purely digital ASIC was designed in Verilog HDL (hardware description language) and embedded in a system wide analog and digital simulati...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2005